Analog comparators are well known in the art. A comparator is a circuit which compares an analog signal with another analog signal, and outputs a binary signal based on the result of the comparison. What is meant here by an analog signal is a signal that can have one of a continuum of amplitude values at any given point in time. In many applications, it is desirable to provide a binary output signal indicating when an analog input signal is above or below a predefined reference level. In this scenario, a substantially fixed reference voltage is applied to one of the inputs of the comparator, and the other input of the comparator receives the analog input signal to be compared. The output signal generated by the comparator will be a binary signal representing whether the input signal is greater than or less than the reference voltage level.
FIG. 1 is a schematic diagram depicting a conventional comparator circuit 100 in which an input signal A is applied to a non-inverting (+) input of a comparator X1, and a reference voltage VREF is applied to an inverting (−) input of the comparator. An output signal Z of the comparator will be a logical “1” whenever the voltage level of signal A is above VREF and a logical “0” whenever signal A is below VREF. In the comparator circuit 100, the reference voltage is generated by a simple voltage divider comprising resistors R1 and R2 connected together in series between a positive voltage supply VDD, which may be, for example, 3.3 volts, and a negative voltage supply VSS, which may be ground. Assuming VSS is equal to zero, the value of VREF will be dependent upon the value of resistors R1, R2, and the value of voltage supply VDD, according to the following relation:
  VREF  =      VDD    ×          R2              R1        +        R2            
Often, a comparator is employed in a noisy environment in which it must detect signal transitions at or near a threshold region of the comparator. In order to prevent glitches from being generated in the output signal during noisy transitions of the input signal as the input signal passes through the threshold region of the comparator, the conventional comparator circuit 100 may be modified by adding hysteresis. Hysteresis is generally a characteristic of the comparator circuit in which the input threshold changes as a function of the input (or output) signal level. There are numerous known techniques for adding hysteresis to a comparator circuit, one of simplest being the use of an additional resistor and transistor, as illustrated in FIG. 2.
FIG. 2 is a schematic diagram depicting a standard comparator circuit 200 including hysteresis. Comparator circuit 200 is essentially the same as comparator circuit 100 shown in FIG. 1, with the addition of a resistor R3 and an n-type metal-oxide semiconductor (NMOS) transistor M1 having a gate terminal (G) for receiving the output signal Z of the comparator X1, a drain terminal (D) connected to a first end of resistor R3 at node n1, and a source terminal (S) connected to a second end of R3, which is coupled to VSS. The operation of the comparator circuit 200 is such that when input A is much less than VREF, output signal Z will be low, and thus transistor M1 will be turned off. Assuming VSS is zero, the value of VREF will then be determined according to the relation:
  VREF  =      VREF1    =          VDD      ×                        R2          +          R3                          R1          +          R2          +          R3                    As input signal A rises above VREF1, output signal Z will go high, thus turning on transistor M1. Assuming M1 has an on-resistance that is substantially less than the resistance of R3, a new reference voltage level VREF2 will be established for the comparator circuit 200 according to the relation:
  VREF  =      VREF2    =          VDD      ×              R2                  R1          +          R2                    The new reference voltage level VREF2 will be lower than VREF1. Thus, when the input signal A passes a switching threshold of the comparator, set primarily by VREF, the output signal Z changes state and the threshold level is subsequently reduced, so that the input signal A must return beyond the previous threshold point before the output of the comparator will change state again.
Unfortunately, the comparator circuits shown in FIGS. 1 and 2 employ a voltage reference that always consumes direct current (DC) power, at least through the series resistor string (assuming the supply voltage VDD is greater than VSS). Consequently, although a resistance of the resistor string can be made substantially high (e.g., on the order of mega ohms) so as to help minimize power consumption, these comparator circuits may not meet low-power specifications for some applications, including, for example, portable applications utilizing battery-powered devices. Moreover, certain specifications, such as, for example, a Universal Serial Bus (USB) On-The-Go (OTG) specification (see, e.g., “On-The-Go Supplement to the USB 2.0 Specification,” Rev. 1.0a, USB Implementers Forum, Inc., June 2003, the disclosure of which is incorporated by reference herein), may require a comparator circuit fabricated using a lower voltage (e.g., 3.3 volts) integrated circuit (IC) process technology to be able to work reliably with input signals referenced to a higher voltage source (e.g., 5 volts). To accomplish this, the voltage VREF, which is used to control the switching threshold of the comparator X1, should be referenced to the higher voltage source. This higher voltage source, however, often exceeds a specified maximum voltage level for the IC process, which can undesirably reduce the reliability of the comparator circuit by overstressing transistor devices in the comparator circuit. Previous attempts to address this problem have typically involved including a precision voltage reference in the comparator circuit for providing a well-controlled (e.g., plus or minus one percent) reference voltage source, thus adding significant cost to the comparator circuit.
A need exists, therefore, for an improved comparator circuit having hysteresis and reduced power consumption, which does not suffer from one or more of the problems exhibited by conventional comparator circuits.